He said that the CPUs, codenamed Milan-X are sampling with customers.

AMD's EPYC 7003-series 'Milan-X' processors have an additional 64MB SRAM 3D V-Cache chiplet atop the compute die that connects to it using AMD's proprietary packaging technology featuring through-silicon-vias (TSVs) as well as direct copper-to-copper hybrid bonding.

The 3D V-Cache is like sticking a conservatory on the processor's L3 cache. It increases its capacity to 768MB. This means that a 64-core Milan-X CPU will have 804MB of cache: 32MB L2, 256MB L3, and 512MB 3D V-Cache. AMD's 3D V-Cache is expected to improve the performance of CPUs with high and lower core counts.

AMD said that its EPYC 7003-series 'Milan-X' CPUs to gain significant performance advantages in high-performance computing (HPC) workloads, physics modelling, and electronics design automation (EDA).

McNamara said that Milan-X would deliver up to a 50 per cent performance increase across technical computing workloads like computational fluid dynamics, EDA, and any sort of advanced physics modelling are going to see a tremendous uplift here.

"We are really excited about this family. It is going to triple the amount of cache offered from Milan and the uplift we are seeing, as I mentioned, is pretty dramatic," he said.