The design tackles the problem of getting increased chipfaults caused by ever-decreasing size. A design research group at the Department of Computer Engineering of the Tallinn University of Technology designed the chip using the 180-nanometer technology which is a little on the elderly side but you have to start some somewhere. The chip area is 2.5 square millimeters.

The students were helped out by IBM, German Aerospace Centre DLR and an Estonian company, Testonica Lab OÜ. The first 40 of the new Estonian-designed test chips will be manufactured in the Fraunhofer Institute in Erlangen, Germany. 

One of the project leaders Jaan Raik said: "Miniaturisation of chip technology has advanced at a dizzying pace in the last few decades. Back then, the technology used was 30 to 40 times more primitive and clumsy compared to today's technology.@

 

The successful project underpins TUT's capability in the field of digital technology and constitutes a basis for the research group's further research in the new Estonian centre of excellence EXCITE, he added.