Published in PC Hardware

Cypress shows off One-Chip ARM Cortex-M0

by on01 February 2016


Claims it is superflexible

Cypress introduced a new series from its PSoC 4 programmable system-on-chip architecture claiming it is the most flexible single-chip SoC.

At the heart of the chip beats a 32-bit ARM-Cortex-M0 core, with 256KB flash memory, 98 general purpose I/Os, 33 programmable analog and digital blocks, a USB device controller, and a control area network (CAN) interface.

The company have targeted the PSoC 4 L-Series for industrial and consumer applications, using the flexibility of the PSoC architecture to aim at different products.

It also plays nice with Cypress's CapSense capacitive touch-sensing technology so it can run user interfaces.

John Weil, vice president of MCU marketing at Cypress said that the PSoC 4 portfolio allows customers to easily migrate from proprietary 8-bit and 16-bit MCUs to ARM Cortex-M0 System-on-Chip.

  "The PSoC 4 L-Series introduces new capabilities such as dual-mutual CapSense blocks with up to 94 channels for large, capacitive-touch home appliance applications and USB and programmable digital blocks to create bit-perfect digital audio solutions. Additionally, it provides all the resources needed to create new products for the emerging USB Type-C market," he said.

The PSoC 4 L-Series has up to 13 programmable analog blocks including 4 high-performance opamps, 4 current-output digital-to-analog converters (IDACs), 2 low-power comparators, a 12-bit SAR ADC and dual CapSense blocks with up to 94 capacitive-sensing channels.

The programmable analog blocks enable engineers to create on-chip, custom analog front ends to support new end-product features, without increasing product costs, size or power consumption.

The PSoC 4 L-Series delivers up to 20 programmable digital blocks including 8 timer/counter/PWM blocks, 4 serial communication blocks and 8 Universal Digital Blocks (UDBs)--programmable digital blocks that each contain two programmable logic devices, a programmable data path and status and control registers.

UDBs can be configured as coprocessors to offload compute-intensive tasks from the ARM Cortex-M0 core. The blocks also enable engineers to implement custom digital peripherals, state machines or glue logic. Traditional MCUs typically require additional ICs to implement this functionality.

The PSoC 4 L-Series is currently sampling with production expected in the first quarter of 2016. Parts will be available in 48-pin TQFP, 64-pin TQFP, 68-pin QFN and 124-pin VFBGA packages from Cypress and its authorized distributors.

 

Last modified on 01 February 2016
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