According to a report from MyDrivers, TSMC is worried that only Apple is interested in using its TSMC's N3 (3nm-class) family of fabrication processes because it costs an arm and a leg.
N3 is an expensive technology to use. N3 extensively uses extreme ultraviolet (EUV) lithography for up to 25 layers, and each EUV scanner costs $150 million - $200 million. TSMC has to charge more for production on its N3 process and successors.
Some say that TSMC might be charging as much as $20,000 per N3 wafer — up from $16,000 for the N5 wafer. Increased costs mean lower profits for AMD, Broadcom, MediaTek, Nvidia, and Qualcomm, which is why chip developers are reconsidering how they create advanced designs and use leading-edge nodes.
China Renaissance analyst Szeho Ng said TSMC is facing a situation where its major customers in HPC (i.e., AMD, Intel), smartphone (i.e., QCOM, MTK) and ASIC (i.e., MRVL, AVGO, GUC) will likely stay in N4/5 and choose N3E as their maiden N3 class foray. Only Apple will have N2 as a baseline.
While this is good for Apple and its Tame Apple Press, it is really bad for TSMC. Not only does it mean that it will sell less chips using a technology it spent a fortune developing, it will be even more dependent on the whims of Jobs' Mob.
TSMC is reportedly considering lowering its quotes for these nodes. TSMC's N3E process uses EUV only for up to 19 layers and features somewhat lower complexity in terms of manufacturing, and is thus cheaper to use. TSMC could lower quotes of N3E production without harming profitability. N3E provides zero advantages over N5 when it comes to SRAM cell scaling, which means larger die sizes when compared to those made on N3/N3B.
AMD publicly announced that it planned to use an N3 node for some of its Zen 5-based designs due in 2024, and Nvidia is expected to adopt N3 for its next-generation Blackwell architecture-based GPUs set to arrive around the same timeframe. Due to high costs, adoption of N3-class nodes is expected to be limited to certain products — so lowering quotes will probably make chip designers reconsider their adoption strategy.