Intel’s vice president of technology development and director of advanced transistor development, Chris Auth, said RibbonFET, Intel’s nanosheet transistor, will replace FinFET technology. Nanosheet transistors, such as Samsung’s Multi-Bridge-Channel FET, provide better control because their gates surround the channel region.
Intel expects up to 15 per cent improvement in energy efficiency with RibbonFET when introduced in the upcoming Intel 20A processing node.
The other thing that Intel is betting on is a new back-side power-delivery scheme which Intel calls PowerVia.
Auth said that this is a more dramatic change as everything’s been on the front side for interconnects and this will be the first time a manufacturer is use the surface on the other side of the wafer. This will separate power from processing. Decoupling is important because power and signal lines have different optimisations. While power lines perform best with low-resistance, high-gauge wires, signal lines need more space between them to ensure minimal interference.
Auth said that Intel decided to introduce the new technologies simultaneously about five years ago, around the same time it lost its lead over competitors. The company decided to pair the technologies to get ahead of its competitors and avoid waiting for the next node to introduce one or the other. Auth says both are seen as “key linchpins” toward Intel’s ambitious goal to regain the lead in processing technology by 2025.
Analysts said it is risky to hedge your bets on two technology changes simultaneously, particularly as Intel had such a disaster bringing in the 10nm node.
Auth said that to reduce the risk involved in the upcoming 20A node, Intel added an internal node pairing PowerVia with the current generation of FinFET. According to test results presented in June 2023, adding PowerVia alone led to a 6 per cent performance gain. This internal stepping-stone has allowed the company to test out back-side power delivery and address any issues regarding process and design.
Intel expects to be ready for manufacturing 20A in the first half of 2024. TSMC plans to begin production of chips with its N2 nanosheet technology in early 2025. Production of N2P chips—a version with back-side power delivery—is expected to begin by 2026. Samsung has already introduced nanosheet transistors in its 3-nm node in 2022 but hasn’t officially announced a timeline for implementing back-side power.