Featured Articles

Hands on: Nvidia Shield Tablet with Android 5.0

Hands on: Nvidia Shield Tablet with Android 5.0

We broke the news of Nvidia's ambitious gaming tablet plans back in May and now the Shield tablet got a bit…

More...
Nokia N1 Android tablet ships in Q1 2015

Nokia N1 Android tablet ships in Q1 2015

Nokia has announced its first Android tablet and when we say Nokia, we don’t mean Microsoft. The Nokia N1 was designed…

More...
Marvell launches octa-core 64-bit PXA1936

Marvell launches octa-core 64-bit PXA1936

Marvell is better known for its storage controllers, but the company doesn’t want to give up on the smartphone and…

More...
TSMC 16nm FinFET Plus in risk production

TSMC 16nm FinFET Plus in risk production

TSMC’s next generation 16nm process has reached an important milestone – 16nm FinFET Plus (16FF+) is now in risk production.

More...
Nvidia GTX 970 SLI tested

Nvidia GTX 970 SLI tested

Nvidia recently released two new graphics cards based on its latest Maxwell GPU architecture, with exceptional performance-per-watt. The Geforce GTX 970…

More...
Frontpage Slideshow | Copyright © 2006-2010 orks, a business unit of Nuevvo Webware Ltd.
Wednesday, 23 July 2014 09:26

AMD sheds light on stacked DRAM APUs

Written by Fudzilla staff

Fast Forward project

AMD is fast tracking stacked DRAM deployment and a new presentation leaked by the company  points to APUs with stacked DRAM, or high bandwidth memory (HBM).

AMD is calling the project "Fastforward" and it is all about boosting memory bandwidth on upcoming APUs. However, AMD is not talking about specific products yet and it is unclear whether HBM will be implemented on its upcoming Carizzo APU. This seems highly unlikely at this point for a number of reasons and if we were to speculate we would say HBM is coming to the next-next generation of AMD APUs.

Stacked DRAM APUs to deliver up to 128GBps bandwidth


Using two DRAM stacks AMD could boost bandwidth at an unprecedented rate. Two stacks would result in a 1024-bit interface and up to 128GBps bandwidth. GDDR5 maxes out at 32 bits and 28GBps. With one stack in play the results are somewhat lower, 512-bit bus and 64GBps bandwidth.

amd-fastforward-project

AMD says it is looking at 1.2V+ DRAM with 2Gb per stack and 4 DRAM modules per stack. However, the presentation states that AMD is currently conducting evaluations of "various architectures and interface options," so it could be a while before we see what exactly it has in mind.


AMD's Fastforward objectives


Stacked DRAM is just part of the story, as AMD's Fastforward initiative is a bit broader. The company says its principle Fastforward objective is to investigate processor and memory technologies for exascale systems based on high volume architectures and open standards.

The end result should "provide significant benefits" to high volume markets and the chipmaker says it is "based on extending high volume APU architecture."

The list of key technologies which are part of the fastforward project is quite long. HSA, stacked DRAM, new APIs, non-volatile memory and processing-in-memory are just some of them.

The presentation was leaked on 3DCenter forums and the pdf can be found here

blog comments powered by Disqus

 

Facebook activity

Latest Commented Articles

Recent Comments