SanDisk is looking at a more aggressive way to deal with AI’s memory bottleneck by moving NAND flash much closer to the compute engine.
According to Leaker Setipark the idea appears in a recent patent that describes stacking a NAND flash tile beneath a processor tile, which could be a GPU or AI accelerator.
HBM has become the favoured answer for high-end AI accelerators, but it brings its own problems.
It is fast, expensive, capacity-limited and in short supply, which is a neat summary of everything the AI industry likes to turn into a crisis. SanDisk’s existing High Bandwidth Flash, or HBF, tries to attack the problem from the NAND side.
HBF uses stacked NAND flash with dense connections, taking some of the packaging ideas used by HBM and applying them to cheaper, higher-capacity flash.
HBM stacks currently offer much lower capacity per stack, while HBF is being pitched as a route to far larger capacities at a more tolerable cost.
However, NAND is denser and cheaper than DRAM, but it is slower, and putting it further away from the processor only makes the latency problem worse.
SanDisk’s patent tries to close that physical gap by placing a NAND flash tile directly under the compute tile using CBA, or CMOS bonded array, technology.
The proposed package would still use HBM on the same interposer, so SanDisk is not pretending NAND can simply replace DRAM in every role. Instead, HBM would handle the most urgent high-speed memory work, while the NAND tile would support larger data sets and heavier read/write operations.
That could be useful for AI inference, where models often need access to large amounts of data without every part of the workload demanding full HBM speed.
It points to a broader shift in AI hardware design. The bottleneck is no longer just how much compute a chip can deliver, but how efficiently it can feed that compute without spending a fortune on memory.
This remains a patent, so nobody should treat it as a product launch. There are obvious questions about power draw, heat, manufacturing cost, endurance and how well software would use such a memory hierarchy.
Still, the strategic direction is interesting. SanDisk is trying to build a bridge between HBM’s speed and NAND’s capacity, which is exactly where AI infrastructure is starting to hurt.
The patent gives SanDisk a defensible position around processor-on-NAND packaging, while its current HBF work moves along a simpler, beside-the-processor route.
The result is less a finished product than a map of where memory architecture may be heading if AI keeps devouring bandwidth, capacity and budgets at its current charming rate.
