The tech industry has been fuelled for decades by the ability of chipmakers to shoehorn ever smaller, faster transistors into the chips that power laptops, servers, and mobile devices. But industry watchers have worried lately that technology was pushing the limits of Moore's Law -- a prediction made by Intel co-founder Gordon Moore in 1965 that computing power would double every two years as chips got more densely packed.

The next generation will shrink that dimension to 7nm, and now the IBM-Samsung development goes one generation beyond that to 5nm.

Huiming Bu, IBM's director of silicon integration and device research, said that all this means transistors can be packed four times as densely on a chip compared with today's technology.

"A nanosheet-based 5nm chip will deliver performance and power, together with density," he said.

There is a slight problem with all this though because currently most chipmakers don't agree on what exactly they're measuring about transistors. And there's also a long road between this research announcement and actual commercial manufacturing.

IBM believes this new process won't cost any more than chips with today's transistor designs, but its approach requires the use of extreme ultraviolet light to etch chip features onto silicon wafers. ALthough this has been put off for years, many are starting to install the gear for 7nm processes.