Our well-informed sources have confirmed that the two companies have been cooperating for years on the next generation memory interfaces. We were told that Xilinx worked closely and helped AMD with some of its HBM and HBM 2 obstacles as apparently both companies were after the same goal.

Increasing the memory bandwidth is the key for both computer graphics that AMD is perusing and for deep learning, high quality video processing and AI that both companies are now after. Stacking memory chips to increase the bandwidth was no walk in the park and both companies worked together to fix the obstacles.

Last year AMD released its HBM 2 powered Vega chips and Xilinx released HBM 2 based Virtex UltraScale+ that also uses the same memory. Back in February, Xilinx released a video of the Virtex UltraScale+ VU37P FPGA device co packaged with HBM 2. The video shows VU37P operating at full speed 460 GB/s error free over 32 channels on the first day of silicon bring up.

Xilinx VU37P largest and fastest FPGA with HBM 2

The Xilinx VU37P is currently the world’s largest and fastest HBM-enabled FPGA featuring2.9M System Logic Cells, 341Mb of on-chip SRAM, 28TOP/s DSP performance, and 96 transceivers (32.75G).

Xilinx also announced Project Everest 7nm HBM enabled ACAP adaptive computer acceleration platform that is designed to address future workloads including some impressive performance increases up to 20-fold for the deep neural networks. The future according to Xilinx is in the heterogeneous computing, the same vision that was many times described to Fudzilla by the CTO of AMD.

A few months back, Fudzilla managed to chat separately with both the CEO of Xilinx Victor Peng and CTO of AMD Mark Papermaster about the next generation data sets. Both agree that the future is heterogeneous and that you need fast memory and interconnects to keep the computer units busy.  

This is why it doesn’t really comes as a big surprise that both companies cooperated on some important technologies such as HBM 2.0.

CEO of Xilinx was CVP of Silicon at AMD

Let me remind you that the CEO of Xilinx - Victor Peng - used to be a VP of silicon engineering at ATI and later AMD and worked as a Corporate VP of Silicon engineering for GPG between 2006 and 2008, so he is aware of the graphics workloads data sets and its memory needs.

Interestingly enough, the Nvidia Volta generation of accelerators uses HBM 2.0 since this is the best and fastest memory around especially for deep learning and artificial intelligence related data sets.

The future for Xilinx, Nvidia and AMD definitely carries the HBM 3 and beyond but this memory is not expected before 2019/2020. Whenever it comes to market it should end up with two times or faster speeds of HBM 2.  

One thing that we learned at Fudzilla after our combined decade of involvement in this industry. There is no such thing as a too fast processor and you always need more and faster memory, today and in the future.