AMD has confirmed that its next-generation EPYC Venice processors based on the Zen 6 architecture will make their official debut during the company’s Advancing AI event scheduled for July 22 and 23. The confirmation came from AMD CTO Mark Papermaster, who described Venice as a processor family designed to handle both traditional enterprise workloads and the growing demand for AI infrastructure, while emphasizing that x86 remains the preferred platform for many enterprise customers.
“I’ll say for me, every enterprise conversation I’m having now, this comes up. Because enterprises have, you know, decades of running x86. They’re not going to move that install base. And what we’ve done at AMD, you know, since we launched the new Zen processor back in 2017. We’re now on our sixth generation. So, at our Advancing AI event on July 22nd and 23rd, we’re rolling out this new generation. You know, it continues the kind of leadership x86 CPU, but it’s designed in such a way that it matches what I just described a moment ago. It’s optimized for standalone x86 traditional workloads,” said AMD’s Mark Papermaster, Chief Technology Officer and Executive Vice President.
EPYC Venice will be AMD’s first server processor built on TSMC’s advanced 2nm manufacturing process and the first high-performance computing chip to enter production on the node. Production is already ramping up in Taiwan, with additional manufacturing expected to move to TSMC’s Arizona facilities in the future.
At the top of the stack, AMD is expected to offer configurations with up to 256 Zen 6 cores, representing a sizeable increase over the current 192-core EPYC Turin processors based on Zen 5 architecture. AMD previously promised that Venice should deliver more than 70 percent higher performance and efficiency compared to the current generation. The platform itself also receives a significant upgrade as Venice moves to the new SP7 socket and introduces support for 16-channel memory capable of delivering up to 1.6 TB/s of bandwidth. AMD is also adopting PCIe Gen 6 connectivity, which should become increasingly important for AI servers and accelerator-heavy deployments.
AMD plans to pair EPYC Venice processors with its upcoming Instinct MI455 accelerators inside future Helios rack-scale systems, targeting AI training and inference workloads alongside traditional cloud and enterprise applications.
When it comes to Zen 6-based consumer products, those are coming at a later date, with recent rumors pointing to Ryzen 10000 “Olympic Ridge”, Threadripper TR6 “Mustang Peak”, and “Medusa Point” APUs, but desktop and mobile launches are not expected until late 2026 or even possibly at the CES show in 2027.
