Begun in 2011 and now extended to September 2017, the Intel-BSC work is currently looking at scalability issues with parallel applications.

Karl Solchenbach, Intel's director, Innovation Pathfinding Architecture Group in Europe said it was important to improve scalability of threaded applications on manycore nodes through the OmpSs programming model.

The collaboration has developed a methodology to measure these effects separately. "An automatic tool not only provides a detailed analysis of performance inhibitors, but also it allows a projection to a higher number of nodes," says Solchenbach.

BSC has been making HPC tools and given Intel an instrumentation package (Extrae), a performance data browser (Paraver), and a simulator (Dimemas) to play with.

Charlie Wuischpard, VP & GM High Performance Computing at Intel said that the Barcelona work is pretty big scale for Chipzilla.

"A major part of what we're proposing going forward is work on many core architecture. Our roadmap is to continue to add more and more cores all the time."

"Our Knights Landing product that is coming out will have 60 or more cores running at a slightly slower clock speed but give you vastly better performance," he said.