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Tuesday, 27 November 2007 13:54

Terabyte-per-second memory bandwidth on tap

Written by David Stellmack

Image

Rambus plans to deliver it by 2011


Rambus says that it is working on new memory signaling technology that is being developed to deliver terabyte-per-second memory bandwidth. The speed increase is required to deliver the performance needed for the evolution of future generation multi-core, game and graphics applications.

The new approach that Rambus is taking to achieve these kinds of speeds is to boost bandwidth to a 32X transfer rate. The concept is that it will be able to transfer 32 times the standard double transfer at the same time in a single clock cycle. This will feature 16Gbps over what Rambus calls the DQ link. With the memory running at speeds of 500Mhz today, they are only able to deliver 1Gbps of bandwidth, but with the same speed with the DQ link technology it will be possible to achieve speeds of 16Gbps or higher. Rambus also announced its FlexLink C/A technology that should also give it the advantage to reach the targeted speeds.

While all of these technologies will not appear until some time in 2011, it is interesting to see how Rambus continues to evolve its technology and continues to move forward. Acceptance in mainstream computing applications fell out of favor with consumers back in the late Pentium III days, and since then Rambus has opened new markets for its technology with gaming consoles and core routers, two of the areas where Rambus technology has done well. Can Rambus make a comeback? Only time will tell.

Last modified on Tuesday, 27 November 2007 14:11

David Stellmack

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