40nm process with mass production before year’s end
Elpida Memory recently announced that it has completed another world record milestone with its development of 2Gb DDR3 SDRAM based on the 40nm fabrication process. The new densely compacted chip size results in a significant 44-percent higher chip yield per wafer compared to the chipmaker’s 50nm DDR3 SDRAM.
In addition, the chipmaker suggests that the investment cost of transitioning from 50nm to 40nm is expected to be nothing at all. The new 40nm 2Gb DDR3 SDRAM achieves an attractive power consumption benefit of two-thirds less input voltage current than its predecessor and supports as low as 1.2V operation.
The company is currently utilizing a product-specific manufacturing system that allows for separately managed manufacturing lines for mobile and PC-related products. Sources within the company have stated that it may be possible to increase the ratio of its 40nm output by as much as 50-percent of its total overall production. While these are large estimates, it can be noted that enthusiast market 40nm DDR3 SDRAM products will hit store shelves sometime in Q1 2010.
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