A reader informed us that Anand went live with some future plans of AMD's, here. AMD went public about its DDR3 plans with its strategic leak and yours truly wrote about this for the INQ exactly seven months ago, today. You can check that part here.
As my original story states that AMD doesn’t believe that it has to move to DDR3 until late 2008 or early 2009, as this is the time when this memory is suppose to go to mainstream.
Barcelona is DDR2 and Hypertransport 2, Budapest will be the first one to support Hypertransport 3 and DDR3 together with parts beyond 45 nanometre, such as the quad core codenamed Shanghai.
We wrote a lot about this roadmap here before, your colleagues confirmed that officially from AMD, here.
Also read:
AMD goes DDR3 at 45 nm
AMD's Shanghai K10.5 has 6 MB L3 cache
AMD 45 nm Shanghai up and running
We told you so, twice
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