Error
  • JUser::_load: Unable to load user with id: 67

Featured Articles

LG G Watch R ships in two weeks

LG G Watch R ships in two weeks

The LG G Watch R, the first Android Wear watch with a truly round face, is coming soon and judging by…

More...
LG unveils NUCLUN big.LITTLE SoC

LG unveils NUCLUN big.LITTLE SoC

LG has officially announced its first smartphone SoC, the NUCLUN, formerly known as the Odin.

More...
Microsoft moves 2.4 million Xbox Ones

Microsoft moves 2.4 million Xbox Ones

Microsoft has announced that it move 2.4 million consoles in fiscal year 2015 Q1. The announcement came with the latest financial…

More...
Gainward GTX 970 Phantom previewed

Gainward GTX 970 Phantom previewed

Nvidia has released two new graphics cards based on its latest Maxwell GPU architecture. The Geforce GTX 970 and Geforce GTX…

More...
EVGA GTX 970 SC ACX 2.0 reviewed

EVGA GTX 970 SC ACX 2.0 reviewed

Nvidia has released two new graphics cards based on its latest Maxwell GPU architecture. The Geforce GTX 970 and Geforce GTX…

More...
Frontpage Slideshow | Copyright © 2006-2010 orks, a business unit of Nuevvo Webware Ltd.
Thursday, 12 April 2007 10:26

IBM Goes 3D with Moore?s Law

Written by

Image

3D chips have 100 times more channels


IBM has worked out a new chip-stacking technology which will allow 3D chips and extend the life of Moore’s Law. The technology, dubbed 'through-silicon vias', allows different chip components to be packaged much closer together for faster, smaller, and lower-power systems.
 
3D chip stacking takes chips and memory devices that traditionally sit side by side on a silicon wafer and stacks them together on top of one another.The compact sandwich of components reduces the size of the overall chip package and boosts the speed at which data flows among the functions on the chip.

The new IBM method eliminates the need for long-metal wires that connect today’s 2-D chips together and rely on through-silicon vias, which are vertical connections etched through the silicon wafer and filled with metal.

It shortens the distance information on a chip needs to travel by 1000 times, and allows for the addition of up to 100 times more channels, or pathways, for that information to flow compared to 2-D chips.

Sample chips will be available in the second half of 2007 and will go into production in 2008.

More here.
Last modified on Thursday, 12 April 2007 10:34
blog comments powered by Disqus

 

Facebook activity

Latest Commented Articles

Recent Comments