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Intel to launch Q8200 and Q8200s R0 revision on February 23 |
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Written by Jon Worrel
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Monday, 26 January 2009 05:30 |
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Halide free, new instructions, power states
On February 23rd, Intel is planning
to launch an R0 revision of its Core 2 Quad Q8200 chip, which is currently using M1
stepping. Additionally, it plans to
launch an energy efficient 65w TDP model of the same chip with the same
stepping revision, the Q8200s, as we've mentioned previously.
These chips will be manufactured
with "all green" materials and will now be halide free, which means
no halogens or halide compounds such as bromine and antimony. This is just another one of Intel's steps to
go above and beyond basic "lead-free" manufacturing to produce safer,
smarter, and more energy-efficient technologies.
The CPUID number on the Q8200 will change from 10677 to 1067A, while the Q8200s will also be 1067A. Additionally, sSpec numbers and part numbers have also been changed. More importantly, however, there will now be Power State Indicator (PSI) support with Intel 4-series chipsets along with three low power states - Extended Stop Grant State, Deep Sleep State and Deeper Sleep State.
Finally, two new instructions have been added, XSAVE/XRSTOR, which manage the existing and future processor extended states on Intel's x86 architecture.
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